DocumentCode :
3147872
Title :
A Data Structure for MOS Circuits
Author :
Lo, Chi-Yuan ; Nham, Hao N. ; Bose, Ajoy K.
Author_Institution :
Bell Laboratories, Murray Hill, NJ
fYear :
1983
fDate :
27-29 June 1983
Firstpage :
619
Lastpage :
624
Abstract :
This paper describes a data structure to represent the driver-load configurations in MOS circuits, which is used universally in the MOTIS simulation environment. In particular, the data structure is used in mixed-mode evaluation including timing, and multiple/unit delay. Other applications include automatic delay calculation, transistor fault modeling, fault collapsing, and fault simulation.
Keywords :
Circuit faults; Circuit simulation; Computational modeling; Data structures; Delay effects; Driver circuits; Large scale integration; MOSFETs; Timing; Variable structure systems;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1983. 20th Conference on
ISSN :
0738-100X
Print_ISBN :
0-8186-0026-8
Type :
conf
DOI :
10.1109/DAC.1983.1585719
Filename :
1585719
Link To Document :
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