Average and maximum power consumption of digital CMOS circuits using LOGIC PICTURES

In this paper, a new methodology is developed to calculate the exact value of both the average and the maximum power consumptions of combinational circuits. The main advantage of this methodology over other techniques reported in the literature is its accuracy. It depends on a new concept called logic pictures. A logic picture is the set of logic values at all gate outputs in the circuit for a given input vector. To verify the correctness of the methodology, it was applied to three circuits from well-known benchmarks as well as commercial ICs. The average and maximum power consumptions obtained were identical to those produced by exhaustive simulation.