DocumentCode
3148945
Title
An Efficient Channel Router
Author
Yoshimura, Takeshi
Author_Institution
NEC Corporation, Kawasaki, JAPAN
fYear
1984
fDate
25-27 June 1984
Firstpage
38
Lastpage
44
Abstract
In the LSI chip layout design, channel routing is one of the key problems. The problem is to route a spcified net list between two rows of terminals across a two layer channel. This paper presents a new routing algorithm, which is an improved version of the classical "left edge algorithm". The new algorithm uses a row by row approach, calculating an optimum net assignment to each row. The algorithm was implemented for examples in previously published papers. Experimental results show that the new algorithm produces optimum solutions in most cases.
Keywords
Design automation; Large scale integration; National electric code; Routing; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1984. 21st Conference on
ISSN
0738-100X
Print_ISBN
0-8186-0542-1
Type
conf
DOI
10.1109/DAC.1984.1585770
Filename
1585770
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