Long term ionization response of several BiCMOS VLSIC technologies

Author

Pease, Ronald L. ; Combs, William ; Clark, Steven

Author_Institution

Mission Research Corp., Albuquerque, NM, USA

fYear

1991

fDate

9-12 Sep 1991

Firstpage

114

Lastpage

118

Abstract

BiCMOS is emerging as a strong competitor to CMOS for gate arrays and memories because of its performance advantages for the same feature size. This paper examines the long term ionization response of five BiCMOS technologies by characterizing test structures which emphasize the various failure modes of CMOS and bipolar. The primary failure modes are found to be associated with the recessed field oxide isolation; edge leakage in the n channel MOSFETs and buried layer to buried layer leakage in the bipolar. The ionization failure thresholds for worst case bias were in the range of 5-20 krad(Si) for both failure modes in all five technologies

Keywords

BiCMOS integrated circuits; VLSI; digital integrated circuits; failure analysis; integrated circuit technology; radiation effects; 5×10³ to 2×10⁴ rad; BiCMOS VLSIC technologies; buried layer; edge leakage; failure modes; feature size; gate arrays; ionization failure thresholds; long term ionization response; memories; recessed field oxide isolation; test structures; BiCMOS integrated circuits; CMOS logic circuits; CMOS technology; Costs; Ionization; Isolation technology; MOSFETs; Space technology; Testing; Weapons;

fLanguage

English

Publisher

ieee

Conference_Titel

Radiation and its Effects on Devices and Systems, 1991. RADECS 91., First European Conference on

Conference_Location

La Grande-Motte

Print_ISBN

0-7803-0208-7

Type

conf

DOI

10.1109/RADECS.1991.213597

Filename

213597