• DocumentCode
    3149749
  • Title

    ARIES: A Workstation Based, Schematic Driven System for Circuit Design

  • Author

    Kao, William H. ; Movahed-Ezazi, Mohammad H. ; Sabiers, Mark L.

  • Author_Institution
    XEROX Corporation, Electronics Division, El Segundo, CA
  • fYear
    1984
  • fDate
    25-27 June 1984
  • Firstpage
    301
  • Lastpage
    307
  • Abstract
    ARIES is a workstation-based, schematic-driven software system for circuit design. It is divided into four major subsystems: SIZING, which generates transistor equivalents for logic gates (NMOS & CMOS technologies) and calculates their sizes (Widths & Lengths); PATHDELAY, which calculates path delays for circuits designed using standard cells; GRAPHICS, a 2-D plotting package that displays results from simulation programs such as SPICE, SUPREM, GEMINI and SUXES; and CANDETOSPICE, which generates, downloads remotely and executes circuit simulation input text files on a VAX 11/780. SIZING, PATHDELAY and CANDE2SPICE use CANDE, a schematic entry graphics editor and database as their front-end. ARIES runs interactively in a multiple overlapping bitmap window (concurrent processing) environment and is completely menu driven. All workstations and VAX 11/780´s are connected together via several 10 MB Ethernet LANs.
  • Keywords
    Transistor sizing; computer-aided engineering; engineering workstation; graphics; path delay analysis; CMOS logic circuits; CMOS technology; Circuit simulation; Circuit synthesis; Graphics; Logic design; Logic gates; MOS devices; Software systems; Workstations; Transistor sizing; computer-aided engineering; engineering workstation; graphics; path delay analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 1984. 21st Conference on
  • ISSN
    0738-100X
  • Print_ISBN
    0-8186-0542-1
  • Type

    conf

  • DOI
    10.1109/DAC.1984.1585811
  • Filename
    1585811