• DocumentCode
    3149793
  • Title

    POLARIS: Polarity Propagation Algorithm for Combinational Logic Synthesis

  • Author

    Shinsha, T. ; Kubo, T. ; Ishihara, K. ; Hikosaka, M. ; Akiyama, K.

  • Author_Institution
    Systems Development Laboratory, Hitachi, Ltd., Kanagawa, Japan
  • fYear
    1984
  • fDate
    25-27 June 1984
  • Firstpage
    322
  • Lastpage
    328
  • Abstract
    A new algorithm for combinational logic synthesis, POLARIS, is described. POLARIS automatically generates optimized gate level logic from functional level specification described by Boolean expressions. It transforms the Boolean expressions into logical operator trees, and produces a network of physical units or units of physical design by introducing polarity and propagating it along the tree. Experimental results show that more than 96% of gate level logic structures are equal to the logic structures designed by experts.
  • Keywords
    Automatic logic units; Constraint optimization; Laboratories; Large scale integration; Logic design; Logic gates; Microcomputers; Network synthesis; Polarization; Software engineering;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 1984. 21st Conference on
  • ISSN
    0738-100X
  • Print_ISBN
    0-8186-0542-1
  • Type

    conf

  • DOI
    10.1109/DAC.1984.1585814
  • Filename
    1585814