DocumentCode
3150548
Title
MGX: An Integrated Symbolic Layout System for VLSI
Author
Ozaki, Masaru ; Watanabe, Miho ; Ikeda, Mikio ; Sato, Koji ; Kakinuma, Morio
Author_Institution
LSI Research and Development Laboratory, Mitsubishi Electric Corporation, Itami, Japan
fYear
1984
fDate
25-27 June 1984
Firstpage
572
Lastpage
579
Abstract
A symbolic layout system for double-metal silicon-gate MOS technology in the style of Gate Matrix is presented. This system provides an integrated layout environment which consists of stick-figure-based graphic editor, a mask artwork generator, a connectivity checker, a circuit parameter extracter and simulator interfaces. All the modules are designed to deal with symbol data, rather than mask artwork, so that fast execution is realized. A method to associate symbol data with actual mask geometry is described along with the data structure employed. Also described is network partitioning by signal names taking into account logical equivalence of transistor circuits.
Keywords
Analytical models; Circuit simulation; Compaction; Data mining; Design automation; Graphics; Logic functions; Parasitic capacitance; Process design; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1984. 21st Conference on
ISSN
0738-100X
Print_ISBN
0-8186-0542-1
Type
conf
DOI
10.1109/DAC.1984.1585855
Filename
1585855
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