• DocumentCode
    3151091
  • Title

    A novel multicore SDR architecture for smart vehicle systems

  • Author

    Yao-Hua Chen ; Chia-Pin Chen ; Pei-Wei Hsu ; Chunfan Wei ; Cheng, Wei-min ; Hsun-Lun Huang ; Tai-Yuan Cheng ; Chen, A.Y.P.

  • Author_Institution
    Inf. & Commun. Res. Labs., Ind. Technol. Res. Inst., Hsinchu, Taiwan
  • fYear
    2012
  • fDate
    5-8 Nov. 2012
  • Firstpage
    275
  • Lastpage
    279
  • Abstract
    A transceiver architecture with multi-core software-defined radio (SDR) technology is proposed for the physical layer inner processing of IEEE 802.11p in intelligent transportation systems (ITS). By localizing the data transmissions between the adjacent digital signal processors (DSP), concatenate memories and concatenate buses are introduced to ease the bandwidth requirement for the data communication among multicores. The proposed transceiver architecture is verified by the electronic system-level (ESL) virtual platform with two application-specific instruction-set processors (ASIP). The high level power estimation results are also provided in this paper. To enhance of the channel estimation and equalization performance of IEEE 802.11p, the capability of the proposed architecture with the decision feedback algorithm is analyzed.
  • Keywords
    automated highways; channel estimation; decision feedback equalisers; digital signal processing chips; instruction sets; radio transceivers; software radio; traffic engineering computing; wireless LAN; ASIP; DSP; ESL; IEEE 802.11; ITS; application-specific instruction-set processors; channel estimation enhancement; concatenate buses; concatenate memories; data communication; data transmissions; decision feedback algorithm; digital signal processors; electronic system-level virtual platform; equalization performance enhancement; high level power estimation; intelligent transportation systems; multicore SDR architecture; physical layer inner processing; smart vehicle systems; software-defined radio technology; transceiver architecture; Acceleration; Hardware; Quadrature amplitude modulation; Receivers; Switches; Time frequency analysis; Timing; IEEE 802.11p; application-specific instruction-set processor (ASIP); electronic system-level (ESL); intelligent transportation systems (ITS); software-defined radio (SDR);
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ITS Telecommunications (ITST), 2012 12th International Conference on
  • Conference_Location
    Taipei
  • Print_ISBN
    978-1-4673-3071-8
  • Electronic_ISBN
    978-1-4673-3069-5
  • Type

    conf

  • DOI
    10.1109/ITST.2012.6425181
  • Filename
    6425181