DocumentCode
3151501
Title
IEEE Std 1581 — A standardized test access methodology for memory devices
Author
Ehrenberg, Heiko ; Russell, Bob
Author_Institution
GOEPEL Electron., Austin, TX, USA
fYear
2011
fDate
20-22 Sept. 2011
Firstpage
1
Lastpage
9
Abstract
Memory devices have been becoming more complex with every generation and this trend is very likely to continue. Different kinds of memories present different challenges for board level test applications. In this paper we discuss several of those challenges and will introduce a new test technology standardized as IEEE Std 1581, offering an elegant solution to many problems related to the test of the board and system level connectivity at memory device pins.
Keywords
DRAM chips; IEEE standards; integrated circuit testing; IEEE Std 1581; board level test application; memory device pin; standardized test access methodology; Clocks; Conferences; Frequency modulation; IEEE standards; Logic design; Logic gates; Pins;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference (ITC), 2011 IEEE International
Conference_Location
Anaheim, CA
ISSN
1089-3539
Print_ISBN
978-1-4577-0153-5
Type
conf
DOI
10.1109/TEST.2011.6139141
Filename
6139141
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