DocumentCode :
3151561
Title :
Systematic and Optimized Layout of MOS Cells
Author :
Saucier, G. ; Thuau, G.
Author_Institution :
Laboratoire "Circuits et systemes" - Institut IMAG, SAINT MARTIN D\´\´HERES CEDEX, FRANCE
fYear :
1985
fDate :
23-26 June 1985
Firstpage :
53
Lastpage :
61
Abstract :
The logical synthesis methods are dependant technology and must be strongly connected to the topological design. We present here a logical and topological synthesis method for complex MOS cells leading to a systematic, optimized and easy to interconnect layout.
Keywords :
Compaction; Extremities; Input variables; Merging; Minimization methods; Transfer functions; Tree data structures;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1985. 22nd Conference on
ISSN :
0738-100X
Print_ISBN :
0-8186-0635-5
Type :
conf
DOI :
10.1109/DAC.1985.1585912
Filename :
1585912
Link To Document :
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