Title :
A Fully Automatic Hierarchical Compactor
Author :
Entenman, George ; Daniel, Stephen W.
Author_Institution :
Microelectronics Center of North Carolina, Research Triangle Park, NC
Abstract :
A fully automatic hierarchical compactor has been developed to translate hierarchical, symbolic cell designs into artwork. The hierarchical compactor takes advantage of the fact that a typical hierarchical design uses the same cell in several different places. Each cell is first examined in all of its contexts. The leaf-cell compactor next compacts each leaf-cell to its minimum possible size in its worst-case environment. The last step is to abut instances of the cells according to the original symbolic layout; some grid line spacings may be increased to avoid breaking wires. The compactor is implemented as a set of rule-driven procedures that find all technology dependent information in technology description files. The result of this strategy is a technology-independent compactor that produces compact, error-free artwork.
Keywords :
CMOS technology; Circuit synthesis; Compaction; Computer errors; Fabrication; Mesh generation; Microelectronics; Process design; Very large scale integration; Wires;
Conference_Titel :
Design Automation, 1985. 22nd Conference on
Print_ISBN :
0-8186-0635-5
DOI :
10.1109/DAC.1985.1585914