Title :
A RISC architectural design of the HERMES multiprocessor vision machine
Author :
Bourbakis, Nikolaos G. ; Tabak, Daniel
Author_Institution :
Sch. of Inf. Technol. & Eng., George Mason Univ., Fairfax, VA, USA
Abstract :
HERMES is a heterogeneous, real-time, systolic array structure consisting of (N/2/sup i/)*(N/2/sup i/) processors, where i is a resolution parameter and 0>
Keywords :
bit-slice computers; computer vision; microprocessor chips; multiprocessing systems; reduced instruction set computing; 16 bit; 2-D photoarray; 32 bit; 8 bit; HERMES multiprocessor vision machine; RISC architectural design; bit-sliced component; heterogeneous real time systolic array; low-level processor node; Computer architecture; Computer vision; Concurrent computing; Hardware; Information technology; Machine vision; Power generation; Reduced instruction set computing; Switches; Systolic arrays;
Conference_Titel :
System Sciences, 1988. Vol.I. Architecture Track, Proceedings of the Twenty-First Annual Hawaii International Conference on
Conference_Location :
Kailua-Kona, HI, USA
Print_ISBN :
0-8186-0841-2
DOI :
10.1109/HICSS.1988.11776
