Title :
Decomposition of Logic Networks into Silicon
Author :
Healey, Steven T. ; Gajski, Daniel D.
Author_Institution :
Department of Computer Science, University of Illinois at Urbana-Champaign, Urbana, IL
Abstract :
This paper describes a module compiler for decomposing arbitrary functional units of any complexity into abstract cells for customized VLSI layouts. The compiler takes the description of a functional unit as input and builds a dependence graph representation. The graph is then partitioned and the nodes are packed into abstract cell output descriptions. The algorithm will tailor the design to a given area and aspect ratio. Routing is done automatically through the cells.
Keywords :
Algorithm design and analysis; Automation; Computer science; Libraries; Logic; Partitioning algorithms; Routing; Silicon; Spirals; Very large scale integration;
Conference_Titel :
Design Automation, 1985. 22nd Conference on
Print_ISBN :
0-8186-0635-5
DOI :
10.1109/DAC.1985.1585930