Efficient VLSI implementation of a 3-layer threshold network

In this paper, the learning algorithm called expand-and-truncate learning (ETL) is proposed to synthesize a three-layer threshold network (TLTN) with guaranteed convergence for an arbitrary switching function. To the best of our knowledge, ETL is the first algorithm to synthesize a threshold network for an arbitrary switching function, automatically determining a required number of threshold elements in the hidden layer. For example, it turns out that the required number of threshold elements in the hidden layer of TLTN for an n-bit parity function is equal to n. Utilizing the fact that the threshold element in the proposed TLTN employs only integer weights and an integer threshold, we propose an efficient method to implement the proposed TLTN using current CMOS VLSI technology. The positive weights are realized using pMOS gates and negative weights using nMOS gates. The weights themselves are realized by manipulating the W/L (width/length) ratio of the respective transistor´s channel