Title :
A Routing Procedure for Mixed Array of Custom Macros and Standard Cells
Author :
Terai, Hidekazu ; Hayase, Michiyoshi ; Kozawa, Tokinori
Author_Institution :
Central Research Laboratory, Hitachi, Ltd., Tokyo, Japan
Abstract :
Routing algorithms for multi- (more than 3) sided pin arrangements are presented. These algorithms are essential for layouts mixing standard cells with custom macros such as ROM, RAM, PLA and ALU. An extended layout model in which these algorithms are applied is also presented. An experimental result regarding the effect on block area with respect to cell height, obtained by comparing an extended model with a traditional model, is described.
Keywords :
Automatic logic units; Laboratories; Large scale integration; Logic design; Pins; Programmable logic arrays; Read only memory; Routing; Shape; Solid modeling;
Conference_Titel :
Design Automation, 1985. 22nd Conference on
Print_ISBN :
0-8186-0635-5
DOI :
10.1109/DAC.1985.1585989
