DocumentCode
3153094
Title
Improved Parameter Extraction Procedure for PSP-Based MOS Varactor Model
Author
Zhu, Z. ; Victory, J. ; Chaudhry, S. ; Dong, L. ; Yan, Z. ; Zheng, J. ; Wu, W. ; Li, X. ; Zhou, Q. ; Kolev, P. ; McAndrew, C.C. ; Gildenblat, G.
Author_Institution
Dept. of Electr. Eng., Arizona State Univ., Tempe, AZ
fYear
2009
fDate
March 30 2009-April 2 2009
Firstpage
148
Lastpage
153
Abstract
We present an improved procedure for extracting parasitic capacitance parameters and gate current parameters for MOSVAR, the industry standard MOS varactormodel. Our technique is verified against measured data from three technology nodes (180 nm, 130 nm and 65 nm), and is also used to validate the MOSVAR P-gate/P-well tunneling current sub-model.
Keywords
CMOS integrated circuits; capacitance; radiofrequency integrated circuits; semiconductor device models; tunnelling; varactors; MOSVAR varactor model; RFCMOS technology; gate current parameters; gate tunneling current; parasitic capacitance parameters; Councils; Current measurement; Data mining; Geometry; Integrated circuit modeling; Parameter extraction; Parasitic capacitance; Solid modeling; Tunneling; Varactors;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronic Test Structures, 2009. ICMTS 2009. IEEE International Conference on
Conference_Location
Oxnard, CA
Print_ISBN
978-1-4244-4259-1
Type
conf
DOI
10.1109/ICMTS.2009.4814629
Filename
4814629
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