DocumentCode :
3153436
Title :
Diagrammatic Functional Description of Microprocessor and Data-Flow Processor
Author :
Odawara, Gotaro ; Tomita, Masahiro ; Ogata, Ichiro
Author_Institution :
Department of Precision Engineering, Faculty of Engineering, University of Tokyo, Tokyo, JAPAN
fYear :
1985
fDate :
23-26 June 1985
Firstpage :
731
Lastpage :
734
Abstract :
This paper discusses a description technique for various kinds of processors. This technique is based on the Symbolic Functional Description Language, which allows logic designers to describe the behavior of hardwares at the register-transfer level in the top-down approach. The SFDL has been applied to the description of the internal behavior of a microprocessor and a data-flow processor. As a result, the SFDL has made it possible to describe the instruction set and the behavior of processors correctly in comprehensible diagrams. The SFDL has been proved to be suitable for the description of data-flow processors.
Keywords :
Circuit simulation; Data engineering; Hardware; Instruction sets; Logic circuits; Logic design; Microprocessors; Precision engineering; Process design; Registers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1985. 22nd Conference on
ISSN :
0738-100X
Print_ISBN :
0-8186-0635-5
Type :
conf
DOI :
10.1109/DAC.1985.1586024
Filename :
1586024
Link To Document :
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