DocumentCode :
3153736
Title :
RTG: Automatic Register Level Test Generator
Author :
Shteingart, Semyon ; Nagle, Andrew W. ; Grason, John
Author_Institution :
AT&T Bell Laboratories, Summit, NJ
fYear :
1985
fDate :
23-26 June 1985
Firstpage :
803
Lastpage :
807
Abstract :
The Register level Test Generator (RTG) system is a software tool that automatically develops test patterns to detect all classical single "stuck-at" faults in a digital circuit. In its current state RTG is targeted for boards containing SSI, MSI, and small LSI components. RTG combines an efficient technique for modeling sequential components at the register level with a simple set of testability design rules, and a powerful test generation algorithm. Thus far in its development RTG has been shown to be a useful tool, typically capable of generating a 100% fault coverage test for a 50 IC board in about 30 CPU minutes on a VAX 11/780 runing UNIX.
Keywords :
Automatic test pattern generation; Automatic testing; Circuit faults; Circuit testing; Registers; Sequential analysis; Software testing; Software tools; System testing; Test pattern generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1985. 22nd Conference on
ISSN :
0738-100X
Print_ISBN :
0-8186-0635-5
Type :
conf
DOI :
10.1109/DAC.1985.1586041
Filename :
1586041
Link To Document :
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