Development of a Timing Analysis Program for Multiple Clocked Network

This paper describes the development of a timing analysis program for logic networks using both critical path and enumerative trace methods. The program utilizes the dynamic data structure of Pascal and its recursive computing power such that depth first search and breath first search can be carried out for delay calculations in a highly efficient manner. The program detects long and short paths between storage elements, setup and hold time violations of flip-flop, and minimum pulse width violations of clock signals.