• DocumentCode
    3153995
  • Title

    Fundamentals of Parallel Logic Simulation

  • Author

    Smith, Robert J., II

  • Author_Institution
    Microelectronics and Computer Technology Corporation, Austin, TX
  • fYear
    1986
  • fDate
    29-2 June 1986
  • Firstpage
    2
  • Lastpage
    12
  • Abstract
    Parallel processing is being recognized as a practical way to achieve very high performance in logic simulation of large designs. This tutorial summarizes many of the basic methods employed, and estimates attainable throughput. Next, data structuring and processing factors are explored as they impact parallel simulation. Experience indicates that support processing necessary before and after simulation kernel execution can be accelerated using parallel methods. We conclude by suggesting pitfalls to avoid, and discuss future development directions for parallel logic simulation.
  • Keywords
    Assembly systems; Central Processing Unit; Computational modeling; Computer simulation; Hardware; Kernel; Logic design; Microelectronics; Parallel processing; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 1986. 23rd Conference on
  • ISSN
    0738-100X
  • Print_ISBN
    0-8186-0702-5
  • Type

    conf

  • DOI
    10.1109/DAC.1986.1586061
  • Filename
    1586061