Title :
System-level design of a delta-sigma modulator target for next generation wireless application
Author :
Qiu, Xiaobo ; Siek, Liter ; Tiew, Kei Tee
Author_Institution :
Nanyang Technol. Univ., Singapore, Singapore
fDate :
Jan. 9 2009-Dec. 11 2009
Abstract :
Delta-sigma (¿¿) converters have been widely used in wireless communications as they provide the most economic speed-accuracy tradeoff. This paper presents the system-level design of a multi-bit continuous-time (CT) ¿¿ analog-to-digital converter (ADC) targeting for the next generation wireless application. The modulator topology is determined based on the application requirements using MATLAB software. The nonidealities associated with the multi-bit CT ¿¿ modulator, such as excess loop delay, system clock jitter, integrator nonideality and multi-bit digital-to-analog converter (DAC) element mismatch, are also modeled in the system-level. With all the nonidealities included, the designed modulator achieves a dynamic range (DR) of 74dB (12 bits) in a 50-MHz signal bandwidth.
Keywords :
delta-sigma modulation; jitter; mathematics computing; modulators; radio networks; MATLAB software; analog-to-digital converter; delay loop; delta-sigma converters; delta-sigma modulator target; frequency 50 MHz; gain 74 dB; integrator nonideality; multibit continuous-time ADC; multibit digital-to-analog converter element; next generation wireless application; system clock jitter; system-level design; Analog-digital conversion; Application software; Clocks; Delay systems; Delta modulation; Digital modulation; MATLAB; System-level design; Topology; Wireless communication; Analog-to-digital converter (ADC); continuous-time (CT); delta-sigma (δΣ) modulation; multi-bit; system-level;
Conference_Titel :
Radio-Frequency Integration Technology, 2009. RFIT 2009. IEEE International Symposium on
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-5031-2
Electronic_ISBN :
978-1-4244-5032-9
DOI :
10.1109/RFIT.2009.5383676
