Analysis of a Two-Bit Frequency Discriminator in an All Digital Phase Locked Loop for RF-Modulation and RF-Frequency Synthesis

Author

Wicpalek, C. ; Mayer, T. ; Maurer, L. ; Vollenbruch, U. ; Springer, A.

Author_Institution

Inst. for Commun. & Inf. Eng., Linz Univ.

fYear

2006

fDate

10-12 Sept. 2006

Firstpage

273

Lastpage

276

Abstract

A key issue in pushing the digitization of phase locked loops (PLLs) for RF transmitters is the realization of proper phase/frequency detectors in the digital domain. This paper presents a simulative analysis of the properties for and requirements of a two-bit frequency discriminator used for digitization of frequency in all digital PLLs (ADPLLs) with two-point modulation. Effects due to reference clock jitter in one-bit and two-bit frequency discriminators are treated. Furthermore, measurement results for the synthesis mode of the ADPLL used in multi-mode capable terminal are given

Keywords

digital phase locked loops; discriminators; frequency modulation; frequency synthesizers; jitter; phase detectors; ADPLL; RF transmitter; RF-frequency synthesis; RF-modulation; all digital phase locked loop; phase-frequency detector; reference clock jitter; two-bit frequency discriminator; Analytical models; Clocks; Digital modulation; Frequency synthesizers; Jitter; Phase detection; Phase frequency detector; Phase locked loops; Radio frequency; Transmitters; mobile communication; phase locked loops; sigma-delta modulation;

fLanguage

English

Publisher

ieee

Conference_Titel

Wireless Technology, 2006. The 9th European Conference on

Conference_Location

Manchester

Print_ISBN

2-9600551-5-2

Type

conf

DOI

10.1109/ECWT.2006.280489

Filename

4057492