Performance analysis of queueing models for multicast ATM switch architectures

Author

Liu, Xinyi ; Mouftah, H.T.

Author_Institution

Dept. of Electr. & Comput. Eng., Queen´´s Univ., Kingston, Ont., Canada

fYear

1994

fDate

25-28 Sep 1994

Firstpage

308

Abstract

A copy network followed by a point-to-point switching network is a design approach that has been traditionally used for multicast switch architectures. One of the inherent problems in this design is the overflow which occurs when the total number of copy requests exceeds the network size. A natural solution is to store the blocked packets in a buffer. This paper investigates the performance of the shared-memory input buffering architecture, and compared it with that of the dedicated-memory input buffers. Results from both analysis and simulation are provided, which show the shared-memory buffering scheme with better performance

Keywords

asynchronous transfer mode; buffer storage; network topology; queueing theory; shared memory systems; switching networks; blocked packets; copy network; dedicated-memory input buffers; design; multicast ATM switch architectures; network size; overflow; performance analysis; point-to-point switching network; queueing models; shared-memory input buffering architecture; simulation; Asynchronous transfer mode; Buffer memories; Circuit topology; Communication system performance; Multicast channels; Queuing analysis; Shared memory systems;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical and Computer Engineering, 1994. Conference Proceedings. 1994 Canadian Conference on

Conference_Location

Halifax, NS

Print_ISBN

0-7803-2416-1

Type

conf

DOI

10.1109/CCECE.1994.405750

Filename

405750