DocumentCode
3154844
Title
An Overview of VHDL Language and Technology
Author
Shahdad, Moe
Author_Institution
CAD Language Systems, Inc., Potomac, MD
fYear
1986
fDate
29-2 June 1986
Firstpage
320
Lastpage
326
Abstract
VHDL language and technology has been under development for the past five years, resulting in a hardware description language that enjoys widespread support within the industry. Version 7.2 of the language was released in August of 1985 and is being considered by the IEEE as a prime candidate for standardization. It is expected that a proposed standard based on Version 7.2 will be available in January of 1987. This standard will be accompanied by a VHDL Tutorial containing extensive examples of the use of the language for hardware design. Activities in the defense and commercial sectors are well underway in order to develop tools targeted to VHDL. These tools include behavioral simulators and synthesis tools, as well as schematic and syntax-directed editors. This paper provides an overview of the VHDL language and technology, reports the status of the various VHDL tools that are under development, and discusses the future of VHDL.
Keywords
Communication standards; Design automation; Design engineering; Formal specifications; Hardware design languages; Procurement; Standardization; Standards development; Standards organizations; Very high speed integrated circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1986. 23rd Conference on
ISSN
0738-100X
Print_ISBN
0-8186-0702-5
Type
conf
DOI
10.1109/DAC.1986.1586107
Filename
1586107
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