Title :
A UHF low-spur, low- phase noise fractional-N synthesizer in 0.18-µm CMOS
Author :
Dan Lei Yan ; Khannur, Pradeep Basappa ; Bin Zhao ; Wooi Gan Yeoh ; Xiaojun, Yuan
Author_Institution :
Inst. of Microelectron., A*STAR (Agency for Sci., Technol. & Res.), Singapore, Singapore
fDate :
Jan. 9 2009-Dec. 11 2009
Abstract :
A fully-integrated fractional-N synthesizer (FNS) is designed and implemented, for a single-chip UHF transceiver, using 1P6M 0.18-μm RF CMOS process. The synthesizer provides very low phase-noise and extremely low reference spur RF source covering 880MHz to 1260MHz, incorporating on-chip active loop-filter and dual-stage charge-pump circuits. The measured phase-noise is -116dBc/Hz at 200KHz offset and -142dBc/Hz at 3.3MHz offset while maintaining 20MHz reference spur levels lowers -84dBc over the entire tuning range. The active die area is 2.2mm × 1.8mm. The chip operates over a wide range of supply voltage from 1.6 V to 2.0V and temperature from -25°C to +75°C respectively. The chip draws 47mA current from a +1.8V supply at +25°C.
Keywords :
CMOS integrated circuits; active filters; charge pump circuits; transceivers; RF CMOS process; current 47 mA; dual-stage charge-pump circuits; frequency 20 MHz; frequency 880 MHz to 1260 MHz; low-phase noise fractional-N synthesizer; onchip active loop-filter; single-chip UHF transceiver; size 0.18 μm; temperature 25 degC to 75 °C; voltage 1.6 V to 2.0 V; CMOS process; Charge pumps; Circuits; Phase measurement; Phase noise; Radio frequency; Semiconductor device measurement; Synthesizers; Transceivers; UHF measurements; CMOS; Fractional-N Synthesizer; Transceiver;
Conference_Titel :
Radio-Frequency Integration Technology, 2009. RFIT 2009. IEEE International Symposium on
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-5031-2
Electronic_ISBN :
978-1-4244-5032-9
DOI :
10.1109/RFIT.2009.5383704
