DocumentCode :
3154939
Title :
An Extensive Logic Simulation Method of Very Large Scale Computer Design
Author :
Miyoshi, Masayuki ; Ooshima, Yoshio ; Sugiyama, Atsushi ; Onizuka, Nobuhiko ; Amano, Nobutaka
Author_Institution :
Kanagawa Works, Hitachi Ltd., Kanagawa-ken, Japan
fYear :
1986
fDate :
29-2 June 1986
Firstpage :
360
Lastpage :
365
Abstract :
The paper describes one of the methods to evaluate the design verification progress of logic simulation. In the development of the very large scale general purpose computer HITACHI M-680H/682H, the function test programs designed for the products have been directly used to verify the design in simulation. Test programs establish the definite goal and enable to extensively verify the design. The simulation techniques, which carry out at high speed the very large design described in different levels of abstraction, have developed for this purpose. The method has detected 30% of design errors of M-68X and effectively reduced its development time.
Keywords :
Computational modeling; Computer errors; Computer simulation; Delay; Design methodology; Large-scale systems; Logic design; Signal design; Signal processing; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1986. 23rd Conference on
ISSN :
0738-100X
Print_ISBN :
0-8186-0702-5
Type :
conf
DOI :
10.1109/DAC.1986.1586113
Filename :
1586113
Link To Document :
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