DocumentCode
3155057
Title
An Effective Delay Analysis System for a Large Scale Computer Design
Author
Toyoshima, Reiji ; Takiguchi, Yoshimitsu ; Matsumoto, Kazumi ; Hongou, Hidetomo ; Hashimoto, Masahiro ; Kamikawai, Ryotaro ; Takizawa, Katsuhiko
Author_Institution
Hitachi Computer Engineering Co., Ltd., Kanagawa-ken, Japan
fYear
1986
fDate
29-2 June 1986
Firstpage
398
Lastpage
403
Abstract
A delay analysis system called DASP was developed. DASP was proved to be very effective to reveal delay errors in a large scale computer design with the following features. (1) It analyzes automatically the delay time of paths between all flip-flops including paths that pass through different hierarchical levels. (2) It traces paths with high speed by a modified depth first search method that was newly developed. (3) It recognizes clock signals providing useful delay analysis information for multiple clocked synchronous logic circuits. DASP was applied to develop Hitachi´s high performance computer M-68X and contributed much to save its development time.
Keywords
Circuit analysis computing; Clocks; Computer errors; Delay effects; Delay systems; Flip-flops; Information analysis; Large-scale systems; Signal analysis; Signal design;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1986. 23rd Conference on
ISSN
0738-100X
Print_ISBN
0-8186-0702-5
Type
conf
DOI
10.1109/DAC.1986.1586120
Filename
1586120
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