Robust 90-nm RF CMOS device models for RFIC design

This paper addresses a key concern of RFIC designers: RF device models are extracted from measurements of common source (CS) devices, but are used in un-common source (UCS) RFIC designs. As well as validating RF models in a complete functional IC, we also introduce flexible active building cells, i.e. intermediate merged cascode cells (MCC) and cross couple pairs (CCP). A good match between measurements and simulations of a MCC and CCP verify the accuracy and reliability of foundry provided RF models. To further demonstrate the CS effect on UCS design in RF applications, a single ended 5 GHz LNA is implemented with first pass design success. Measured results match well with post-simulations. The LNA delivers state-of-the-art performance, with a NF of 3±0.5 dB and 16 dB gain. The 1-dB compression point of -3 dBm is achieved with a supply current of 13 mA. The methodology presented here should be applicable to other technology nodes. A 90-nm CMOS process has been used in the current work.