DocumentCode :
3155883
Title :
Plug-In Timing Models for an Abstract Timing Verifier
Author :
Wallace, David E. ; Sequin, C.H.
Author_Institution :
Computer Science Division Electrical Engineering and Computer Sciences, University of California, Berkeley, CA
fYear :
1986
fDate :
29-2 June 1986
Firstpage :
683
Lastpage :
689
Abstract :
We have developed the concept of an abstract timing verifier that accepts plug-compatible timing models in a common framework containing the scheduling algorithms and the user interface. Depending on the design phase and the particular level of design representation used, the most suitable timing model can be plugged into this framework and operated in a standard way. This paper formally introduces the abstract timing model and defines the operations that need to be carried out in such models. It discusses the models used in existing commercial timing verifiers in this context and compares them against some new and modified models. It presents some guidelines for the extension of this library of timing models.
Keywords :
Clocks; Computer science; Context modeling; Delay; Libraries; Pattern analysis; Scheduling algorithm; Signal analysis; Timing; User interfaces;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1986. 23rd Conference on
ISSN :
0738-100X
Print_ISBN :
0-8186-0702-5
Type :
conf
DOI :
10.1109/DAC.1986.1586164
Filename :
1586164
Link To Document :
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