Title :
Circuit modeling of programmable logic gate based on controlled quenching of series-connected negative differential resistance devices
Author :
Niu, G.F. ; Chen, K.J. ; Chen, R.M.M. ; Ruan, G. ; Waho, T. ; Maezawa, K. ; Yamamoto, M.
Author_Institution :
Dept. of Electron. Eng., City Univ. of Hong Kong, Kowloon, Hong Kong
Abstract :
Logic synthesis and circuit modeling of programmable logic gate based on controlled quenching of series connected negative differential resistance (NDR) devices are presented. At the rising edge of a clocked supply voltage, the NDR devices are quenched in the ascending order of peak currents which can be reordered by the control gates and input gate biases, thus providing programmable logic functions
Keywords :
active networks; logic gates; negative resistance devices; programmable logic devices; resonant tunnelling devices; RTDs; circuit modeling; clocked supply voltage; control gates; controlled quenching; input gate biases; logic functions; logic synthesis; peak currents; programmable logic gate; series-connected negative differential resistance devices; Circuit synthesis; Clocks; Logic circuits; Logic devices; Logic functions; Logic gates; Programmable control; Programmable logic arrays; Programmable logic devices; Voltage control;
Conference_Titel :
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN :
0-7803-3583-X
DOI :
10.1109/ISCAS.1997.621444
