DocumentCode :
315700
Title :
Low power and low area or high throughput single-ended bus and I/O protocols
Author :
Yuan, Jiren
Author_Institution :
Dept. of Phys. & Meas. Technol., Linkoping Univ., Sweden
Volume :
3
fYear :
1997
fDate :
9-12 Jun 1997
Firstpage :
1932
Abstract :
Low power, low area and high data throughput strategies using large or relatively large swing for single-ended buses and I/Os are addressed. Four protocols are presented, combining swing-reduction with charge-recycling. Protocols 1 and 2 use Vdd/2 swing with three signal levels while protocols 3 and 4 use Vdd/3 swing with four signal levels. Their average power reducing factors are 2.5, 3.2, 4.7 and 4.3 (>5.5 for large loads) respectively. Protocol 3 merges two buses or I/Os into a single one while retaining the transmission capacity of two, an improvement factor of 2 either in bus number or in data throughput
Keywords :
CMOS digital integrated circuits; integrated circuit design; logic design; protocols; CMOS chip; charge-recycling; high data throughput strategy; low area design; low power design; single-ended I/O protocols; single-ended bus; swing-reduction; Area measurement; Capacitance; Energy consumption; Integrated circuit interconnections; Physics; Power supplies; Protocols; Robustness; Throughput; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN :
0-7803-3583-X
Type :
conf
DOI :
10.1109/ISCAS.1997.621529
Filename :
621529
Link To Document :
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