A low power digital pixel sensor with a dynamically biased ADC

In this paper, a low power CMOS image sensor using DPS scheme is proposed. A sub-threshold control unit is used in order to enable or disable the pixel level ADC depending on the photodiode sensing voltage, hence enabling to save the static power needed to operate the pixel level ADC. Results show that up to 90% power saving is achieved when compared with the conventional digital pixel sensor. To compensate for the non-linearity of the proposed time-domain ADC a clock modulation compensation scheme is proposed which can be fully implemented in digital. The sensor was implemented in 0.35 mum CMOS process and the sensor operation is successfully tested.