Title :
Harmonic distortion in switched-current circuits
Author :
Martins, J.M. ; Dias, V.F. ; Silva, M.M.
Author_Institution :
INESC, Lisbon, Portugal
Abstract :
Harmonic distortion in basic Switched-Current (SI) cells is investigated and closed-form equations are presented here, for the first time, concerning the effects of Vt mismatch, clock-feedthrough, and signal dependent output conductance. We show that with short channel transistors the variation of the output conductance is the dominant source of distortion. However, with careful design and layout, an overall linearity of about -70 dB can be expected. Our results are confirmed both by simulation and by measurements on an IC prototype using a 1.2 μm CMOS digital technology
Keywords :
CMOS analogue integrated circuits; harmonic distortion; network analysis; switched current circuits; 1.2 micron; CMOS technology; SI cells; clock-feedthrough; closed-form equations; harmonic distortion; short channel transistors; signal dependent output conductance; switched-current circuits; threshold voltage mismatch; CMOS digital integrated circuits; CMOS integrated circuits; CMOS technology; Clocks; Distortion measurement; Equations; Harmonic distortion; Linearity; Switching circuits; Virtual prototyping;
Conference_Titel :
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN :
0-7803-3583-X
DOI :
10.1109/ISCAS.1997.621546
