DocumentCode
3157300
Title
Continuous retiming: algorithms and applications
Author
Pan, Peichen
Author_Institution
Dept. of Electr. & Comput. Eng., Clarkson Univ., Potsdam, NY, USA
fYear
1997
fDate
12-15 Oct 1997
Firstpage
116
Lastpage
121
Abstract
This paper introduces a continuous version of retiming (called c-retiming). As retiming, a c-retiming of a circuit is also an assignment of values to the nodes in the circuit. However, values in c-retiming can be real numbers as opposed to integers in retiming. Retiming and c-retiming are strongly related. In fact, a c-retiming can be converted to a retiming by a simple rounding, and the potential degradation in clock period is less than the largest gate delay in a circuit. C-retiming has two very attractive properties. It can be computed much more efficiently than retiming. Consequently, one can compute a retiming by computing a proper c-retiming. Our experimental results indicate this approach can drastically speed up the solution of retiming problems. More importantly, c-retiming can be combined with circuit modifications. Because of this property, c-retiming can be used as a tool to study synthesis and optimization problems in conjunction with retiming. We demonstrate this using the classical tree mapping problem, for which we derive an algorithm that produces a solution with a clock period provably close to optimal while considering retiming
Keywords
circuit optimisation; logic CAD; c-retiming; clock period; continuous retiming; gate delay; optimization problems; tree mapping problem; Application software; Circuit synthesis; Clocks; Degradation; Delay; Integrated circuit interconnections; Latches; Logic circuits; Logic gates; Marine vehicles;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 1997. ICCD '97. Proceedings., 1997 IEEE International Conference on
Conference_Location
Austin, TX
ISSN
1063-6404
Print_ISBN
0-8186-8206-X
Type
conf
DOI
10.1109/ICCD.1997.628857
Filename
628857
Link To Document