Comparison between nMOS pass transistor logic style vs. CMOS complementary cells

Author

Mehrotra, Rakesh ; Pedram, Massoud ; Wu, Xunwei

Author_Institution

Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA

fYear

1997

fDate

12-15 Oct 1997

Firstpage

130

Lastpage

135

Abstract

This paper compares three different logic styles for implementing arbitrary Boolean functions of up to three inputs in terms of their layout area, delay and power dissipation. The three styles are nMOS pass transistor based design, NAND gate based design, and CMOS complementary logic design. Results of the comparison show that pass transistor based design is superior to NAND based design, but loses to CMOS complementary logic design

Keywords

Boolean functions; CMOS logic circuits; logic design; CMOS complementary cells; NAND gate based design; arbitrary Boolean functions; delay; layout area; logic design; nMOS pass transistor logic style; power dissipation; Adders; Boolean functions; CMOS logic circuits; Capacitance; Delay; Inverters; Logic design; MOS devices; MOSFETs; Power dissipation;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer Design: VLSI in Computers and Processors, 1997. ICCD '97. Proceedings., 1997 IEEE International Conference on

Conference_Location

Austin, TX

ISSN

1063-6404

Print_ISBN

0-8186-8206-X

Type

conf

DOI

10.1109/ICCD.1997.628859

Filename

628859

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3157739