Title :
A VLSI implementation of a maximum/minimum coder for low-rate digital communications systems
Author :
Foster, John ; Echols, Kevin
Author_Institution :
Dept. of Electr. Eng., North Carolina A&T State Univ., Greensboro, NC, USA
Abstract :
Custom design VLSI implementation of the maximum/minimum coding (MMC) algorithm is presented. The algorithm decomposition, floorplan, basic cell design, layout, and simulation are discussed. The major subsystems (input buffer, max/min calculator, output buffer, control PLAs) are presented. The resulting chip design is composed of 40000 CMOS transistors with 2.5 μm linewidth technology. Computer-aided design (CAD) tools and CAD platforms are discussed, emphasizing the relevant areas for custom VLSI design in higher education
Keywords :
CMOS integrated circuits; VLSI; circuit CAD; digital communication systems; education; encoding; 2.5 μm linewidth technology; 2.5 micron; CAD platforms; CAD tools; CMOS transistors; algorithm; cell design; control PLA; custom design VLSI; digital communications systems; floorplan; higher education; input buffer; layout; low rate systems; max/min calculator; maximum/minimum coder; maximum/minimum coding; output buffer; Algorithm design and analysis; Change detection algorithms; Chip scale packaging; Decoding; Design automation; Digital communication; Encoding; Image reconstruction; Speech coding; Very large scale integration;
Conference_Titel :
Southeastcon '90. Proceedings., IEEE
Conference_Location :
New Orleans, LA
DOI :
10.1109/SECON.1990.117813
