Title :
Highly linear CMOS low noise amplifier with IIP3 boosting technique
Author :
Mujeeb, Abdul ; Yuwono, Sigit ; Lee, Jeong Seon ; Lee, Sang-Gug
Author_Institution :
-Radio Lab., Inf. & Commun. Univ., Daejeon
Abstract :
A High Linear technique for the (CMOS) low noise amplifier (LNA) is presented, the proposed method uses an additional PMOS transistor for IIP3 boosting the third order intermodulation distortion (IMD3) current generated by the CS and CG stages.However, reducing the gain and increasing noise figure, this technique is applied to achieve the linearity of CMOS LNA using 0.18 mum technology. The LNA achieved +14 dBm IIP3, 12 dB gain, and 1.2 dB NF at 2.4 GHz, consuming 8.2 mA from 1.8 V supply.
Keywords :
MOSFET; intermodulation distortion; low noise amplifiers; CMOS low noise amplifier; IIP3 boosting technique; IMD3; LNA; PMOS transistor; current 8.2 mA; frequency 2.4 GHz; gain; gain 12 dB; intermodulation distortion; noise figure; noise figure 1.2 dB; size 0.18 mum; voltage 1.8 V; Boosting; CMOS technology; Character generation; Intermodulation distortion; Linearity; Low-noise amplifiers; MOSFETs; Noise figure; Noise generators; Noise reduction; CMOS; LNA; PMOS IIP3 boosting technique;
Conference_Titel :
SoC Design Conference, 2008. ISOCC '08. International
Conference_Location :
Busan
Print_ISBN :
978-1-4244-2598-3
Electronic_ISBN :
978-1-4244-2599-0
DOI :
10.1109/SOCDC.2008.4815660
