A new design of reverse converter for a three-moduli set

The residue number system (RNS) is a non-weighted number system which can result in high-speed and low-power implementation of digital signal processing (DSP) computation algorithms. In this paper, an efficient design of the reverse converter for the new three-moduli set {2ⁿ-1, 2n, 2^2n-1-1} is presented. The reverse converter is achieved by an adder-based implementation of mixed-radix conversion (MRC) algorithm. The proposed converter has lower conversion delay and less hardware requirements than the other converters for four-moduli sets with similar dynamic range. Furthermore, the proposed reverse converter is faster than the reverse converter of the recently introduced three-moduli set {2ⁿ-1, 2ⁿ, 22ⁿ⁺¹-1}.