DocumentCode :
3159148
Title :
Architectural Partitioning for System Level Design
Author :
Lagnese, E. Dirkes ; Thomas, D.E.
Author_Institution :
Electrical and Computer Engineering Department, Carnegie Mellon University, Pittsburgh, PA
fYear :
1989
fDate :
25-29 June 1989
Firstpage :
62
Lastpage :
67
Abstract :
Architectural partitioning is introduced as a new phase in system level synthesis. Architectural partitioning extracts high level structure from the behavior of an architecture. This paper describes the APARTY architectural partitioner, an automatic Architectural PARTYtioner that supports synthesis in the System Architect´s Workbench. APARTY uses a unique multi-stage clustering technique. Knowledge of the high level structure of an architecture aids synthesis tools in choosing a better design in terms of area. For one example, architectural partitioning reduced the number of wiring tracks in the final design by 20%.
Keywords :
Computer architecture; Concurrent computing; Data mining; Hardware; Parallel processing; Permission; Routing; System-level design; Wire; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1989. 26th Conference on
ISSN :
0738-100X
Print_ISBN :
0-89791-310-8
Type :
conf
DOI :
10.1109/DAC.1989.203371
Filename :
1586355
Link To Document :
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