Spatial characterization of hot carriers injected into the gate dielectric stack of a MOSFET based non-volatile memory device

Author

Shappir, Assaf ; Levy, David ; Geva, Gil ; Shacham-Diamand, Yosi ; Lusky, Eli ; Bloom, Ilan ; Eitan, Boaz

Author_Institution

Res. Inst. for Nano-Sci. & Nano-Technol., Tel Aviv Univ., Ramat-Aviv, Israel

fYear

2002

fDate

1 Dec. 2002

Firstpage

58

Lastpage

60

Abstract

Subthreshold slope degradation in the NROM™ localized-charge-trapping non-volatile memory device is utilized to investigate the spatial distributions of hot carriers injected into the gate dielectric stack. An analytical model is presented, which attributes the subthreshold slope degradation to the formation of a fringing field induced extended depletion layer. It is shown that electron and hole trapping takes place mostly in a narrow, 40-50 nm wide, region near the drain junction.

Keywords

MOSFET; electron traps; hole traps; hot carriers; semiconductor device models; semiconductor storage; MOSFET; NROM; analytical model; depletion layer; electron trapping; fringing field; gate dielectric stack; hole trapping; hot carrier injection; localized charge trapping; nonvolatile memory; spatial distribution; subthreshold slope; Capacitance; Degradation; Dielectric devices; Electron traps; Gas insulated transmission lines; Hot carriers; Industrial electronics; MOSFET circuits; Nonvolatile memory; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical and Electronics Engineers in Israel, 2002. The 22nd Convention of

Print_ISBN

0-7803-7693-5

Type

conf

DOI

10.1109/EEEI.2002.1178321

Filename

1178321