DocumentCode :
315978
Title :
Supporting hardware trade analysis and cost estimation using design complexity
Author :
Salchak, Paul W. ; Chawla, Praveen
Author_Institution :
Symvionics Inc., Beavercreek, OH, USA
fYear :
1997
fDate :
19-22, Oct 1997
Firstpage :
126
Lastpage :
133
Abstract :
Defines and illustrates a hardware design complexity measure (HDCM) and describe its potential applications to trade-off analysis and cost estimation. Specifically, we define a VHDL complexity measure. We have derived the HDCM from an avionics software design complexity measure (ASDCM) that we have shown to be effective in estimation and optimization of overall software costs. Similar to the ASDCM, we believe that the proposed HDCM could enable more optimal hardware design, implementation and maintenance
Keywords :
avionics; costing; hardware description languages; logic design; optimisation; VHDL complexity measure; avionics software design complexity measure; cost estimation; cost optimization; hardware design complexity measure; hardware implementation; hardware maintenance; hardware trade-off analysis; optimal hardware design; Aerospace electronics; Application software; Costs; Design optimization; Force measurement; Hardware; Software design; Software measurement; Software quality; Variable speed drives;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VHDL International Users' Forum, 1997. Proceedings
Conference_Location :
Arlington, VA
Print_ISBN :
0-8186-8180-2
Type :
conf
DOI :
10.1109/VIUF.1997.623941
Filename :
623941
Link To Document :
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