DocumentCode :
3159866
Title :
Design of a flash A/D converter with dual-bootstrapped THA circuit
Author :
Son, Young-jun ; Kim, Won ; Yoon, Kwang-sub
Author_Institution :
Dept. Electron. Eng., INHA Univ., Incheon
Volume :
03
fYear :
2008
fDate :
24-25 Nov. 2008
Abstract :
This paper describes a 6 bit 1 GS/s CMOS flash A/D converter using dual-bootstrapped THA circuit. The proposed flash architecture employs bootstrap technique in the track and hold circuit for low bit error ratio and high linearity. The measurement result shows a conversion rate of 1Gs/s, SNDR of 35.1dB, DNL/INL of plusmn0.65LSB/plusmn0.80LSB, and power dissipation of 228 mW at 1.8 V. The chip is implemented in a 0.18 mum CMOS 1-poly 6-metal technology and occupies an active area of 0.7 mm2.
Keywords :
CMOS integrated circuits; analogue-digital conversion; bootstrap circuits; error statistics; sample and hold circuits; 0.18 mum CMOS 1-poly 6-metal technology; CMOS flash A/D converter; THA circuit; bit error ratio; bootstrap; track and hold circuit; CMOS technology; Circuits; Clocks; Consumer electronics; Linearity; Radar tracking; Semiconductor device measurement; Signal generators; Switches; Voltage; A/D Converter; Bootstrap; CMOS; Track and Hold;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SoC Design Conference, 2008. ISOCC '08. International
Conference_Location :
Busan
Print_ISBN :
978-1-4244-2598-3
Electronic_ISBN :
978-1-4244-2599-0
Type :
conf
DOI :
10.1109/SOCDC.2008.4815738
Filename :
4815738
Link To Document :
بازگشت