DocumentCode :
3159967
Title :
Low voltage analog digital converter using sigma-delta modulator
Author :
Jeong, Tae-Seong ; Choi, Wooseok ; Jun-Gi ; Yoo, Changsik
Author_Institution :
Div. of Electr. & Comput. Eng., Hanyang Univ., Seoul
Volume :
03
fYear :
2008
fDate :
24-25 Nov. 2008
Abstract :
This paper proposes low voltage, low power discrete sigma-delta modulator for DVB-H. Full-feedforward structure and double sampling technique were used in order to achieve low voltage and wide bandwidth. To overcome the noise folding problem, generated when double sampling technique is applied, fully floating DAC is used. Simulated results of the modulator, designed in a 0.18 mum CMOS technology, achieves a 58 dB SNDR in a 4 MHz bandwidth and dissipates 8 mW from a 1.2 V supply.
Keywords :
CMOS integrated circuits; digital video broadcasting; sigma-delta modulation; CMOS technology; DVB-H; SNDR; bandwidth 4 MHz; digital video broadcasting-handheld; double sampling technique; full-feedforward structure; fully floating DAC; low voltage analog digital converter; noise folding problem; power 8 mW; sigma-delta modulator; voltage 1.2 V; Analog-digital conversion; Bandwidth; Delta-sigma modulation; Digital modulation; Digital video broadcasting; Energy consumption; Feedback; Low voltage; Noise shaping; Sampling methods; analog-to-digital conversion; double sampling; feedforward architecture; sigma delta modulation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SoC Design Conference, 2008. ISOCC '08. International
Conference_Location :
Busan
Print_ISBN :
978-1-4244-2598-3
Electronic_ISBN :
978-1-4244-2599-0
Type :
conf
DOI :
10.1109/SOCDC.2008.4815745
Filename :
4815745
Link To Document :
بازگشت