Thermal Evaluation of Two Die Stacked FBGA Packages

This paper presents the thermal evaluation of two die stacked FBGA (D2-FBGA) with identical die structure. Thermal performance was evaluated experimentally with the package size of 15 mmtimes5 mmtimes1.2 mm, 2 signal metal layers, 208 ball count containing an identical die stack configuration with two Delco PST4-02 thermal test dies of 6.35 mmtimes6.35 mm size each. Experiments were carried out using JEDEC still air chamber as per JESD 51.2 [10], JEDEC specified forced air environmental condition as per JESD 51.6 [11] with 1 m/s & 2 m/s and ring cold plate for theta JB measurement as per JESD 51.8 [7]. Junction temperature was measured by electrical test method (ETM) as outlined by JEDEC standard JESD 51.1 [8]. Board and ambient temperatures were measured by thermocouples. Experimental data were obtained for 1 SOP and 1S2P PCB with a sample size of five to calculate the temperature rise above the ambient for both top and bottom dies in still and forced air JEDEC environmental conditions. The same data were used to generate the thermal resistance matrix for linear super position matrix formulation to identify the changes in thermal cross talk between the dies at various power level combinations. The commercially available Flotherm V6.1 software code was used to create and simulate CFD model of D2-FBGA package in JEDEC specified still air, forced air ring cold plate set-up for theta JB. The model was simulated for various power level combinations and validated successfully within the agreeable limit of accuracy (10 %) against experimental results for the temperature rise, Psi JB (Psi_jb) in theta JA (thetas_ja) condition with 1S0P and 1S2P boards and theta JB with 1S2P board.