The FACS VLSI architecture for model-based vision

The paper is motivated by the need to provide hardware support for model-based vision. We propose a dedicated parallel VLSI architecture for low-level image processing for model based vision. The proposed architecture will permit concurrent processing of multiple images and concurrent computations on each image. Each dedicated VLSI processor is composed of an algorithm processor and an input/output processor. Our design approach facilitates expansion of the system so that more processors can be rapidly incorporated in future. The approach is illustrated by means of a feature evaluator design