Title :
What could a virtual wafer look like?
Author_Institution :
Intel Corp., Santa Clara, CA, USA
Abstract :
A simple, yet efficient data structure and a generic wafer state maintenance algorithm are proposed, which unify geometry- and field-oriented representations. The implementation is based an a constrained Delaunay triangulation of the geometry and the cloud of interior mesh points which tesselates the structure with edge/triangle entities. Points are stored using a region quadtree which enables optimal O(N log(N)) performance for all range-search based operations. It is shown how this unified data structure can be equipped with generic algorithmic modules that can be applied to tool integration, to mesh generation, and to morphological solid modeling as used in topography simulation
Keywords :
VLSI; computational complexity; data structures; digital simulation; electronic engineering computing; integrated circuit modelling; mesh generation; quadtrees; solid modelling; surface topography; FEM; VLSI wafer; constrained Delaunay triangulation; generic algorithmic modules; generic wafer state maintenance algorithm; interior mesh points; mesh generation; morphological solid modeling; optimal O(N log(N)) performance; range-search based operations; region quadtree; tool integration; topography simulation; unified data structure; virtual wafer; Buffer layers; Clouds; Computer crashes; Geometry; Level set; Mesh generation; Predictive models; Robustness; Shape control; Surface topography;
Conference_Titel :
Microelectronics, 1997. Proceedings., 1997 21st International Conference on
Conference_Location :
Nis
Print_ISBN :
0-7803-3664-X
DOI :
10.1109/ICMEL.1997.625179
