Low power high throughput current mode signalling technique for global VLSI interconnect

This paper investigates a low power, high speed & energy efficient current mode signaling technique. For current mode (CM) signaling a complete system consists of driver & receiver with decoding circuit. By analytical analysis it is also proved that the current mode signaling technique offer a three times improvement in performance parameter i.e. delays when compared to voltage mode. A new low swing current mode interconnect system is proposed, whose performance is further improved by reducing the input impedance of current mode system. The proposed low swing current mode interconnect system gives 66.46% and 60.66% improvement in delay when compared with voltage mode (VM) and VM with repeater insertion. Also reduced input impedance CM system offers 87.03% and 84%, reduction in delay when compared with the conventional voltage mode and voltage mode with repeater inserted signaling technique. Proposed low swing CM model consume 11% less power for data rate of 4Gbps. Similarly, CM dissipates 0.05pJ energy whereas VM consume 0.106pJ for a single bit transmission across the interconnect.