A novel method for diagnosis of board level interconnect faults using boundary scan

Over the past years complexity of PCB board and the surface mount technology has increased by leaps and bounds. This limits the use of traditional in-circuit test techniques for testing of such boards. This paper addresses the various issues of board level interconnect testing using Boundary Scan architecture. This work implements BIST using Boundary Scan technique. A new Algorithm is developed to diagnose PCB level faults. The dominant-1 (WOR), dominant-0 (WAND) and stuck-at faults are taken up in this paper. The proposed algorithm is also compared with the existing algorithms viz modified counting, walking one´s algorithm and others. Our results are found to be better than the existing algorithms.