DocumentCode :
3161145
Title :
Comprehensive Analysis of the Impact of via Design on High-Speed Signal Integrity
Author :
Chang, R.W.Y. ; See, Kye Yak ; Chua, Eng Kee
Author_Institution :
DSO Nat. Lab., Singapore
fYear :
2007
fDate :
10-12 Dec. 2007
Firstpage :
262
Lastpage :
266
Abstract :
In all modern high-speed digital board designs, every slightest discontinuity on the board has to be considered carefully, especially the vias, which are abundantly used in digital design. As frequency increases and signal rise time reduces, via causes impedance discontinuities resulting in signal reflections and hence deterioration of signal integrity (SI) and system performance. The paper carries out a comprehensive study of the impacts of various via design parameters on SI using a full-wave electromagnetic simulator (CST microwave suite). The design parameters under study are via diameter, via height and the excess via stub in a multilayer PCB. The study allows high-speed digital designers to have a more in-depth assessment of via design and its effect on SI performance.
Keywords :
printed circuit design; printed circuits; CST microwave suite; comprehensive analysis; full-wave electromagnetic simulator; high-speed digital board design; high-speed signal integrity; impedance discontinuities; signal reflections; Costs; Design engineering; Fabrication; High speed integrated circuits; Impedance; Manufacturing processes; Performance analysis; Scattering parameters; Signal analysis; Signal design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Packaging Technology Conference, 2007. EPTC 2007. 9th
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-1324-9
Electronic_ISBN :
978-1-4244-1323-2
Type :
conf
DOI :
10.1109/EPTC.2007.4469746
Filename :
4469746
Link To Document :
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