Title :
Sapphire Wafer Bumping by Lead-free Solder Paste Printing Process
Author :
Yang, John Zhiyuan
Author_Institution :
Peregrine Semicond., San Diego
Abstract :
Peregrine´s silicon on sapphire technology provides high performance RF IC devices to wireless market, while for bumping on this type of sapphire wafer new challenges will be encountered. High residual stress accumulated on sapphire wafer surface may cause bumping reliability performance issue. Sapphire wafer´s singulation process, which uses three-point breaking method, requires bumping must be of a reasonable structure to achieve high mechanical strength. Through bumping structure design and process planning, all the encountered issues have been solved. The bumping process by lead-free solder paste printing method and the bumping structure design proposed in this paper provides a volume production solution for sapphire wafer.
Keywords :
integrated circuit design; integrated circuit manufacture; integrated circuit reliability; internal stresses; mechanical strength; printing; radiofrequency integrated circuits; sapphire; silicon-on-insulator; solders; wafer-scale integration; Peregrine´s silicon on sapphire technology; RF IC devices; Si-Al2O3; bumping reliability performance; bumping structure design; lead-free solder paste printing process; mechanical strength; process planning; residual stress accumulation; sapphire wafer bumping; singulation process; three-point breaking method; volume production solution; Environmentally friendly manufacturing techniques; Lead; Printing; Process design; Process planning; Production; Radio frequency; Radiofrequency integrated circuits; Residual stresses; Silicon;
Conference_Titel :
Electronics Packaging Technology Conference, 2007. EPTC 2007. 9th
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-1323-2
Electronic_ISBN :
978-1-4244-1323-2
DOI :
10.1109/EPTC.2007.4469766
